The present invention relates generally to semiconductor analysis and, more particularly, to semiconductor analysis involving heating a semiconductor die.
The electronics industry continues to rely upon advances in semiconductor technology, including integrated circuits (ICs), to realize higher-functioning devices in more compact areas. For many applications, realizing higher-functioning devices requires integrating a large number of electronic devices into a single silicon die. In addition, many of the individual devices within the die are being manufactured with smaller physical dimensions. As the number of electronic devices per given area of the silicon die increases, and as the size of the individual devices decreases, testing processes become more important and more difficult.
Many integrated circuit dice include circuits having random defects. These defects can recover or fail under particular operating conditions and at higher temperatures. In addition, design faults can be sensitive to such particular operating conditions. Traditionally, isolation of IC faults has been attempted by operating the die in a manner that causes a failure to occur and by attempting to attribute the failure to a malfunctioning circuit element in the IC. One manner in which this has been performed is to operate the die at full speed while applying external heat to the die. Such electrical testing, however, does not always assist in fault isolation because many failure symptoms can manifest themselves in different ways, and malfunctions can result from a variety of different types of defects including defects at non-suspect circuitry locations.
One such testing application that has traditionally been very difficult to accomplish includes physical diagnosis of failing circuit paths in a semiconductor die. Identifying these xe2x80x9ccritical circuit pathsxe2x80x9d has been attempted using simulation in conjunction with a thorough understanding of semiconductor die design, followed by verification using physical probing of a suspect circuit. This physical analysis is difficult, however, because it generally requires intimate knowledge of the die design and is particularly difficult for use in analyzing a flip-chip type integrated circuit die. The identification and analysis of critical circuit paths continues to present a challenge to the advancement of the semiconductor industry.
The present invention is directed to a method and system for analyzing a semiconductor die involving the selective application of heat to the die using a heating grid. The present invention is exemplified in a number of implementations and applications, some of which are summarized below.
According to an example embodiment, the present invention is directed to a method for manufacturing and analyzing a semiconductor die using a particular application of heat. A plurality of heating elements are formed in a semiconductor die. At least one such heating element (such as an activatable semiconductor arrangement) is selectively caused to generate heat while the die is operating. The generated heat is used to heat one or more portions of the die, and a response, such as a failed operation, is detected in connection with analysis of the die. This enhances the ability to identify defects, design flaws, and critical circuit paths including, for example, critical timing circuit paths of the semiconductor die; and can be performed without necessarily using expensive laboratory test equipment. In addition, this method does not necessarily require operating the die at a known failing condition or under precisely controlled ambient temperature and voltage conditions.
According to another example embodiment of the present invention, a system is adapted to selectively heat a semiconductor die having a plurality of heating elements formed therein and to analyze the die in response to the selective heating. The system includes a controller adapted to selectively cause at least one of the heating elements to heat at least one adjacent portion of the die. A testing device is adapted to operate the die while heat is being applied, and a detector is adapted to detect a response from the die, the response being related to the operation and heat application.
The above summary of the present invention is not intended to describe each illustrated embodiment or every implementation of the present invention. The figures and detailed description that follow more particularly exemplify these embodiments.